Subject: [PATCH] add u-boot logo function for Yocto 2.1


diff --git a/arch/arm/imx-common/video.c b/arch/arm/imx-common/video.c
index bc34e12..5e05e71 100644
--- a/arch/arm/imx-common/video.c
+++ b/arch/arm/imx-common/video.c
@@ -52,6 +52,9 @@ int board_video_skip(void)
 			       displays[i].mode.name,
 			       displays[i].mode.xres,
 			       displays[i].mode.yres);
+#ifdef CONFIG_ADV_UBOOT_LOGO_DEBUG
+			printf("xxx\n");
+#endif
 		} else
 			printf("LCD %s cannot be configured: %d\n",
 			       displays[i].mode.name, ret);
diff --git a/arch/arm/include/asm/ioNew.h b/arch/arm/include/asm/ioNew.h
new file mode 100644
index 0000000..31f6b7d
--- /dev/null
+++ b/arch/arm/include/asm/ioNew.h
@@ -0,0 +1,371 @@
+/*
+ *  linux/include/asm-arm/io.h
+ *
+ *  Copyright (C) 1996-2000 Russell King
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * Modifications:
+ *  16-Sep-1996	RMK	Inlined the inx/outx functions & optimised for both
+ *			constant addresses and variable addresses.
+ *  04-Dec-1997	RMK	Moved a lot of this stuff to the new architecture
+ *			specific IO header files.
+ *  27-Mar-1999	PJB	Second parameter of memcpy_toio is const..
+ *  04-Apr-1999	PJB	Added check_signature.
+ *  12-Dec-1999	RMK	More cleanups
+ *  18-Jun-2000 RMK	Removed virt_to_* and friends definitions
+ */
+#ifndef __ASM_ARM_IO_H
+#define __ASM_ARM_IO_H
+
+#ifdef __KERNEL__
+
+#include <linux/types.h>
+#include <asm/byteorder.h>
+#include <asm/memory.h>
+#if 0	/* XXX###XXX */
+#include <asm/arch/hardware.h>
+#endif	/* XXX###XXX */
+
+/*
+ * Given a physical address and a length, return a virtual address
+ * that can be used to access the memory range with the caching
+ * properties specified by "flags".
+ */
+#define MAP_NOCACHE	(0)
+#define MAP_WRCOMBINE	(0)
+#define MAP_WRBACK	(0)
+#define MAP_WRTHROUGH	(0)
+
+/*
+ * Take down a mapping set up by map_physmem().
+ */
+
+
+/*
+ * Generic virtual read/write.  Note that we don't support half-word
+ * read/writes.  We define __arch_*[bl] here, and leave __arch_*w
+ * to the architecture specific code.
+ */
+#define __arch_getb(a)			(*(volatile unsigned char *)(a))
+#define __arch_getw(a)			(*(volatile unsigned short *)(a))
+#define __arch_getl(a)			(*(volatile unsigned int *)(a))
+
+#define __arch_putb(v,a)		(*(volatile unsigned char *)(a) = (v))
+#define __arch_putw(v,a)		(*(volatile unsigned short *)(a) = (v))
+#define __arch_putl(v,a)		(*(volatile unsigned int *)(a) = (v))
+
+
+#define __raw_writeb(v,a)	__arch_putb(v,a)
+#define __raw_writew(v,a)	__arch_putw(v,a)
+#define __raw_writel(v,a)	__arch_putl(v,a)
+
+#define __raw_readb(a)		__arch_getb(a)
+#define __raw_readw(a)		__arch_getw(a)
+#define __raw_readl(a)		__arch_getl(a)
+
+/*
+ * TODO: The kernel offers some more advanced versions of barriers, it might
+ * have some advantages to use them instead of the simple one here.
+ */
+#define dmb()		__asm__ __volatile__ ("" : : : "memory")
+#define __iormb()	dmb()
+#define __iowmb()	dmb()
+
+#define writeb(v,c)	({ u8  __v = v; __iowmb(); __arch_putb(__v,c); __v; })
+#define writew(v,c)	({ u16 __v = v; __iowmb(); __arch_putw(__v,c); __v; })
+#define writel(v,c)	({ u32 __v = v; __iowmb(); __arch_putl(__v,c); __v; })
+
+#define readb(c)	({ u8  __v = __arch_getb(c); __iormb(); __v; })
+#define readw(c)	({ u16 __v = __arch_getw(c); __iormb(); __v; })
+#define readl(c)	({ u32 __v = __arch_getl(c); __iormb(); __v; })
+
+/*
+ * The compiler seems to be incapable of optimising constants
+ * properly.  Spell it out to the compiler in some cases.
+ * These are only valid for small values of "off" (< 1<<12)
+ */
+#define __raw_base_writeb(val,base,off)	__arch_base_putb(val,base,off)
+#define __raw_base_writew(val,base,off)	__arch_base_putw(val,base,off)
+#define __raw_base_writel(val,base,off)	__arch_base_putl(val,base,off)
+
+#define __raw_base_readb(base,off)	__arch_base_getb(base,off)
+#define __raw_base_readw(base,off)	__arch_base_getw(base,off)
+#define __raw_base_readl(base,off)	__arch_base_getl(base,off)
+
+/*
+ * Clear and set bits in one shot. These macros can be used to clear and
+ * set multiple bits in a register using a single call. These macros can
+ * also be used to set a multiple-bit bit pattern using a mask, by
+ * specifying the mask in the 'clear' parameter and the new bit pattern
+ * in the 'set' parameter.
+ */
+
+#define out_arch(type,endian,a,v)	__raw_write##type(cpu_to_##endian(v),a)
+#define in_arch(type,endian,a)		endian##_to_cpu(__raw_read##type(a))
+
+#define out_le32(a,v)	out_arch(l,le32,a,v)
+#define out_le16(a,v)	out_arch(w,le16,a,v)
+
+#define in_le32(a)	in_arch(l,le32,a)
+#define in_le16(a)	in_arch(w,le16,a)
+
+#define out_be32(a,v)	out_arch(l,be32,a,v)
+#define out_be16(a,v)	out_arch(w,be16,a,v)
+
+#define in_be32(a)	in_arch(l,be32,a)
+#define in_be16(a)	in_arch(w,be16,a)
+
+#define out_8(a,v)	__raw_writeb(v,a)
+#define in_8(a)		__raw_readb(a)
+
+#define clrbits(type, addr, clear) \
+	out_##type((addr), in_##type(addr) & ~(clear))
+
+#define setbits(type, addr, set) \
+	out_##type((addr), in_##type(addr) | (set))
+
+#define clrsetbits(type, addr, clear, set) \
+	out_##type((addr), (in_##type(addr) & ~(clear)) | (set))
+
+#define clrbits_be32(addr, clear) clrbits(be32, addr, clear)
+#define setbits_be32(addr, set) setbits(be32, addr, set)
+#define clrsetbits_be32(addr, clear, set) clrsetbits(be32, addr, clear, set)
+
+#define clrbits_le32(addr, clear) clrbits(le32, addr, clear)
+#define setbits_le32(addr, set) setbits(le32, addr, set)
+#define clrsetbits_le32(addr, clear, set) clrsetbits(le32, addr, clear, set)
+
+#define clrbits_be16(addr, clear) clrbits(be16, addr, clear)
+#define setbits_be16(addr, set) setbits(be16, addr, set)
+#define clrsetbits_be16(addr, clear, set) clrsetbits(be16, addr, clear, set)
+
+#define clrbits_le16(addr, clear) clrbits(le16, addr, clear)
+#define setbits_le16(addr, set) setbits(le16, addr, set)
+#define clrsetbits_le16(addr, clear, set) clrsetbits(le16, addr, clear, set)
+
+#define clrbits_8(addr, clear) clrbits(8, addr, clear)
+#define setbits_8(addr, set) setbits(8, addr, set)
+#define clrsetbits_8(addr, clear, set) clrsetbits(8, addr, clear, set)
+
+/*
+ * Now, pick up the machine-defined IO definitions
+ */
+#if 0	/* XXX###XXX */
+#include <asm/arch/io.h>
+#endif	/* XXX###XXX */
+
+/*
+ *  IO port access primitives
+ *  -------------------------
+ *
+ * The ARM doesn't have special IO access instructions; all IO is memory
+ * mapped.  Note that these are defined to perform little endian accesses
+ * only.  Their primary purpose is to access PCI and ISA peripherals.
+ *
+ * Note that for a big endian machine, this implies that the following
+ * big endian mode connectivity is in place, as described by numerous
+ * ARM documents:
+ *
+ *    PCI:  D0-D7   D8-D15 D16-D23 D24-D31
+ *    ARM: D24-D31 D16-D23  D8-D15  D0-D7
+ *
+ * The machine specific io.h include defines __io to translate an "IO"
+ * address to a memory address.
+ *
+ * Note that we prevent GCC re-ordering or caching values in expressions
+ * by introducing sequence points into the in*() definitions.  Note that
+ * __raw_* do not guarantee this behaviour.
+ *
+ * The {in,out}[bwl] macros are for emulating x86-style PCI/ISA IO space.
+ */
+#ifdef __io
+#define outb(v,p)			__raw_writeb(v,__io(p))
+#define outw(v,p)			__raw_writew(cpu_to_le16(v),__io(p))
+#define outl(v,p)			__raw_writel(cpu_to_le32(v),__io(p))
+
+#define inb(p)	({ unsigned int __v = __raw_readb(__io(p)); __v; })
+#define inw(p)	({ unsigned int __v = le16_to_cpu(__raw_readw(__io(p))); __v; })
+#define inl(p)	({ unsigned int __v = le32_to_cpu(__raw_readl(__io(p))); __v; })
+
+#endif
+
+#define outb_p(val,port)		outb((val),(port))
+#define outw_p(val,port)		outw((val),(port))
+#define outl_p(val,port)		outl((val),(port))
+#define inb_p(port)			inb((port))
+#define inw_p(port)			inw((port))
+#define inl_p(port)			inl((port))
+
+#define outsb_p(port,from,len)		outsb(port,from,len)
+#define outsw_p(port,from,len)		outsw(port,from,len)
+#define outsl_p(port,from,len)		outsl(port,from,len)
+#define insb_p(port,to,len)		insb(port,to,len)
+#define insw_p(port,to,len)		insw(port,to,len)
+#define insl_p(port,to,len)		insl(port,to,len)
+
+/*
+ * ioremap and friends.
+ *
+ * ioremap takes a PCI memory address, as specified in
+ * linux/Documentation/IO-mapping.txt.  If you want a
+ * physical address, use __ioremap instead.
+ */
+extern void * __ioremap(unsigned long offset, size_t size, unsigned long flags);
+extern void __iounmap(void *addr);
+
+/*
+ * Generic ioremap support.
+ *
+ * Define:
+ *  iomem_valid_addr(off,size)
+ *  iomem_to_phys(off)
+ */
+#ifdef iomem_valid_addr
+#define __arch_ioremap(off,sz,nocache)					\
+ ({									\
+	unsigned long _off = (off), _size = (sz);			\
+	void *_ret = (void *)0;						\
+	if (iomem_valid_addr(_off, _size))				\
+		_ret = __ioremap(iomem_to_phys(_off),_size,nocache);	\
+	_ret;								\
+ })
+
+#define __arch_iounmap __iounmap
+#endif
+
+#define ioremap(off,sz)			__arch_ioremap((off),(sz),0)
+#define ioremap_nocache(off,sz)		__arch_ioremap((off),(sz),1)
+#define iounmap(_addr)			__arch_iounmap(_addr)
+
+/*
+ * DMA-consistent mapping functions.  These allocate/free a region of
+ * uncached, unwrite-buffered mapped memory space for use with DMA
+ * devices.  This is the "generic" version.  The PCI specific version
+ * is in pci.h
+ */
+extern void *consistent_alloc(int gfp, size_t size, dma_addr_t *handle);
+extern void consistent_free(void *vaddr, size_t size, dma_addr_t handle);
+extern void consistent_sync(void *vaddr, size_t size, int rw);
+
+/*
+ * String version of IO memory access ops:
+ */
+extern void _memcpy_fromio(void *, unsigned long, size_t);
+extern void _memcpy_toio(unsigned long, const void *, size_t);
+extern void _memset_io(unsigned long, int, size_t);
+
+extern void __readwrite_bug(const char *fn);
+
+/*
+ * If this architecture has PCI memory IO, then define the read/write
+ * macros.  These should only be used with the cookie passed from
+ * ioremap.
+ */
+#ifdef __mem_pci
+
+#define readb(c) ({ unsigned int __v = __raw_readb(__mem_pci(c)); __v; })
+#define readw(c) ({ unsigned int __v = le16_to_cpu(__raw_readw(__mem_pci(c))); __v; })
+#define readl(c) ({ unsigned int __v = le32_to_cpu(__raw_readl(__mem_pci(c))); __v; })
+
+#define writeb(v,c)		__raw_writeb(v,__mem_pci(c))
+#define writew(v,c)		__raw_writew(cpu_to_le16(v),__mem_pci(c))
+#define writel(v,c)		__raw_writel(cpu_to_le32(v),__mem_pci(c))
+
+#define memset_io(c,v,l)		_memset_io(__mem_pci(c),(v),(l))
+#define memcpy_fromio(a,c,l)		_memcpy_fromio((a),__mem_pci(c),(l))
+#define memcpy_toio(c,a,l)		_memcpy_toio(__mem_pci(c),(a),(l))
+
+#define eth_io_copy_and_sum(s,c,l,b) \
+				eth_copy_and_sum((s),__mem_pci(c),(l),(b))
+
+static inline int
+check_signature(unsigned long io_addr, const unsigned char *signature,
+		int length)
+{
+	int retval = 0;
+	do {
+		if (readb(io_addr) != *signature)
+			goto out;
+		io_addr++;
+		signature++;
+		length--;
+	} while (length);
+	retval = 1;
+out:
+	return retval;
+}
+
+#elif !defined(readb)
+
+#define readb(addr)			(__readwrite_bug("readb"),0)
+#define readw(addr)			(__readwrite_bug("readw"),0)
+#define readl(addr)			(__readwrite_bug("readl"),0)
+#define writeb(v,addr)			__readwrite_bug("writeb")
+#define writew(v,addr)			__readwrite_bug("writew")
+#define writel(v,addr)			__readwrite_bug("writel")
+
+#define eth_io_copy_and_sum(a,b,c,d)	__readwrite_bug("eth_io_copy_and_sum")
+
+#define check_signature(io,sig,len)	(0)
+
+#endif	/* __mem_pci */
+
+/*
+ * If this architecture has ISA IO, then define the isa_read/isa_write
+ * macros.
+ */
+#ifdef __mem_isa
+
+#define isa_readb(addr)			__raw_readb(__mem_isa(addr))
+#define isa_readw(addr)			__raw_readw(__mem_isa(addr))
+#define isa_readl(addr)			__raw_readl(__mem_isa(addr))
+#define isa_writeb(val,addr)		__raw_writeb(val,__mem_isa(addr))
+#define isa_writew(val,addr)		__raw_writew(val,__mem_isa(addr))
+#define isa_writel(val,addr)		__raw_writel(val,__mem_isa(addr))
+#define isa_memset_io(a,b,c)		_memset_io(__mem_isa(a),(b),(c))
+#define isa_memcpy_fromio(a,b,c)	_memcpy_fromio((a),__mem_isa(b),(c))
+#define isa_memcpy_toio(a,b,c)		_memcpy_toio(__mem_isa((a)),(b),(c))
+
+#define isa_eth_io_copy_and_sum(a,b,c,d) \
+				eth_copy_and_sum((a),__mem_isa(b),(c),(d))
+
+static inline int
+isa_check_signature(unsigned long io_addr, const unsigned char *signature,
+		    int length)
+{
+	int retval = 0;
+	do {
+		if (isa_readb(io_addr) != *signature)
+			goto out;
+		io_addr++;
+		signature++;
+		length--;
+	} while (length);
+	retval = 1;
+out:
+	return retval;
+}
+
+#else	/* __mem_isa */
+
+#define isa_readb(addr)			(__readwrite_bug("isa_readb"),0)
+#define isa_readw(addr)			(__readwrite_bug("isa_readw"),0)
+#define isa_readl(addr)			(__readwrite_bug("isa_readl"),0)
+#define isa_writeb(val,addr)		__readwrite_bug("isa_writeb")
+#define isa_writew(val,addr)		__readwrite_bug("isa_writew")
+#define isa_writel(val,addr)		__readwrite_bug("isa_writel")
+#define isa_memset_io(a,b,c)		__readwrite_bug("isa_memset_io")
+#define isa_memcpy_fromio(a,b,c)	__readwrite_bug("isa_memcpy_fromio")
+#define isa_memcpy_toio(a,b,c)		__readwrite_bug("isa_memcpy_toio")
+
+#define isa_eth_io_copy_and_sum(a,b,c,d) \
+				__readwrite_bug("isa_eth_io_copy_and_sum")
+
+#define isa_check_signature(io,sig,len)	(0)
+
+#endif	/* __mem_isa */
+#endif	/* __KERNEL__ */
+#endif	/* __ASM_ARM_IO_H */
diff --git a/board/freescale/mx6advantech/mx6advantech.c b/board/freescale/mx6advantech/mx6advantech.c
index 5f1e205..f44ac05 100755
--- a/board/freescale/mx6advantech/mx6advantech.c
+++ b/board/freescale/mx6advantech/mx6advantech.c
@@ -744,18 +744,42 @@ static void enable_lvds(struct display_info_t const *dev)
 	struct iomuxc *iomux = (struct iomuxc *)
 				IOMUXC_BASE_ADDR;
 	u32 reg = readl(&iomux->gpr[2]);
+#ifdef CONFIG_ADV_UBOOT_LOGO
+	reg |= IOMUXC_GPR2_DATA_WIDTH_CH0_24BIT |
+		IOMUXC_GPR2_DATA_WIDTH_CH1_24BIT;
+#else
 	reg |= IOMUXC_GPR2_DATA_WIDTH_CH0_18BIT |
 	       IOMUXC_GPR2_DATA_WIDTH_CH1_18BIT;
+#endif
 	writel(reg, &iomux->gpr[2]);
 }
 
 struct display_info_t const displays[] = {{
 	.bus	= -1,
 	.addr	= 0,
+#ifdef CONFIG_ADV_UBOOT_LOGO
+	.pixfmt	= IPU_PIX_FMT_RGB24,
+#else
 	.pixfmt	= IPU_PIX_FMT_RGB666,
+#endif
 	.detect	= NULL,
 	.enable	= enable_lvds,
 	.mode	= {
+#ifdef CONFIG_ADV_UBOOT_LOGO
+		.name           = "Hannstar-XGA",
+		.refresh        = 60,
+		.xres           = 800,
+		.yres           = 480,
+		.pixclock       = 15385,
+		.left_margin    = 220,
+		.right_margin   = 40,
+		.upper_margin   = 21,
+		.lower_margin   = 7,
+		.hsync_len      = 60,
+		.vsync_len      = 10,
+		.sync           = FB_SYNC_EXT,
+		.vmode          = FB_VMODE_NONINTERLACED
+#else
 		.name           = "Hannstar-XGA",
 		.refresh        = 60,
 		.xres           = 1024,
@@ -769,6 +793,7 @@ struct display_info_t const displays[] = {{
 		.vsync_len      = 10,
 		.sync           = FB_SYNC_EXT,
 		.vmode          = FB_VMODE_NONINTERLACED
+#endif
 } }, {
 	.bus	= -1,
 	.addr	= 0,
@@ -814,6 +839,10 @@ size_t display_count = ARRAY_SIZE(displays);
 
 static void setup_display(void)
 {
+#ifdef CONFIG_ADV_UBOOT_LOGO_DEBUG
+	printf("ADV UBOOT LOGO setup display !!!\n");
+#endif
+
 	struct mxc_ccm_reg *mxc_ccm = (struct mxc_ccm_reg *)CCM_BASE_ADDR;
 	struct iomuxc *iomux = (struct iomuxc *)IOMUXC_BASE_ADDR;
 	int reg;
@@ -825,11 +854,17 @@ static void setup_display(void)
 	imx_setup_hdmi();
 
 	/* Turn on LDB0, LDB1, IPU,IPU DI0 clocks */
+#ifdef CONFIG_ADV_UBOOT_LOGO
+	/* mxc_ccm->CCGR3 address: 0x20c4074 */
+#endif
 	reg = readl(&mxc_ccm->CCGR3);
 	reg |=  MXC_CCM_CCGR3_LDB_DI0_MASK | MXC_CCM_CCGR3_LDB_DI1_MASK;
 	writel(reg, &mxc_ccm->CCGR3);
 
 	/* set LDB0, LDB1 clk select to 011/011 */
+#ifdef CONFIG_ADV_UBOOT_LOGO
+	/* mxc_ccm->cs2cdr address: 0x20c402c */
+#endif
 	reg = readl(&mxc_ccm->cs2cdr);
 	reg &= ~(MXC_CCM_CS2CDR_LDB_DI0_CLK_SEL_MASK
 		 | MXC_CCM_CS2CDR_LDB_DI1_CLK_SEL_MASK);
@@ -837,34 +872,65 @@ static void setup_display(void)
 	      | (3 << MXC_CCM_CS2CDR_LDB_DI1_CLK_SEL_OFFSET);
 	writel(reg, &mxc_ccm->cs2cdr);
 
+#ifdef CONFIG_ADV_UBOOT_LOGO
+	/* mxc_ccm->cscmr2 address: 0x20c4020 */
+#endif
 	reg = readl(&mxc_ccm->cscmr2);
 	reg |= MXC_CCM_CSCMR2_LDB_DI0_IPU_DIV | MXC_CCM_CSCMR2_LDB_DI1_IPU_DIV;
 	writel(reg, &mxc_ccm->cscmr2);
 
+#ifdef CONFIG_ADV_UBOOT_LOGO
+	/* mxc_ccm->chsccdr address: 0x20c4034 */
+#endif
 	reg = readl(&mxc_ccm->chsccdr);
 	reg |= (CHSCCDR_CLK_SEL_LDB_DI0
 		<< MXC_CCM_CHSCCDR_IPU1_DI0_CLK_SEL_OFFSET);
+#ifdef CONFIG_ADV_UBOOT_LOGO
+	reg &= ~(MXC_CCM_CHSCCDR_IPU1_DI1_CLK_SEL_MASK);
+#endif
 	reg |= (CHSCCDR_CLK_SEL_LDB_DI0
 		<< MXC_CCM_CHSCCDR_IPU1_DI1_CLK_SEL_OFFSET);
 	writel(reg, &mxc_ccm->chsccdr);
 
+#ifdef CONFIG_ADV_UBOOT_LOGO
+	/* iomux->gpr[2] address: 0x20e0008 */
+#endif
 	reg = IOMUXC_GPR2_BGREF_RRMODE_EXTERNAL_RES
 	     | IOMUXC_GPR2_DI1_VS_POLARITY_ACTIVE_LOW
 	     | IOMUXC_GPR2_DI0_VS_POLARITY_ACTIVE_LOW
 	     | IOMUXC_GPR2_BIT_MAPPING_CH1_SPWG
+#ifdef CONFIG_ADV_UBOOT_LOGO
+	     | IOMUXC_GPR2_DATA_WIDTH_CH1_24BIT
+#else
 	     | IOMUXC_GPR2_DATA_WIDTH_CH1_18BIT
+#endif
 	     | IOMUXC_GPR2_BIT_MAPPING_CH0_SPWG
+#ifdef CONFIG_ADV_UBOOT_LOGO
+	     | IOMUXC_GPR2_DATA_WIDTH_CH0_24BIT
+	     | IOMUXC_GPR2_LVDS_CH0_MODE_ENABLED_DI0
+             | IOMUXC_GPR2_LVDS_CH1_MODE_DISABLED;
+#else
 	     | IOMUXC_GPR2_DATA_WIDTH_CH0_18BIT
 	     | IOMUXC_GPR2_LVDS_CH0_MODE_DISABLED
 	     | IOMUXC_GPR2_LVDS_CH1_MODE_ENABLED_DI0;
+#endif
 	writel(reg, &iomux->gpr[2]);
 
+#ifdef CONFIG_ADV_UBOOT_LOGO
+	/* iomux->gpr[3] address: 0x20e000c */
+#endif
 	reg = readl(&iomux->gpr[3]);
+
+#ifdef CONFIG_ADV_UBOOT_LOGO
+	reg &= ~(IOMUXC_GPR3_LVDS1_MUX_CTL_MASK);
+	writel(reg, &iomux->gpr[3]);
+#else
 	reg = (reg & ~(IOMUXC_GPR3_LVDS1_MUX_CTL_MASK
 			| IOMUXC_GPR3_HDMI_MUX_CTL_MASK))
 	    | (IOMUXC_GPR3_MUX_SRC_IPU1_DI0
 	       << IOMUXC_GPR3_LVDS1_MUX_CTL_OFFSET);
 	writel(reg, &iomux->gpr[3]);
+#endif
 }
 #endif /* CONFIG_VIDEO_IPUV3 */
 
@@ -985,9 +1051,15 @@ int board_early_init_f(void)
 #if defined (CONFIG_ADVANTECH) && defined(CONFIG_SUPPORT_LVDS)
 void setup_lvds_init(void)
 {
+#ifdef CONFIG_ADV_UBOOT_LOGO
+	imx_iomux_v3_setup_pad(IOMUX_LCD_BKLT_PWM | MUX_PAD_CTRL(NO_PAD_CTRL)); /* LCD_BKLT_PWM */
+	imx_iomux_v3_setup_pad(IOMUX_LCD_BKLT_EN | MUX_PAD_CTRL(NO_PAD_CTRL)); /* LCD_BKLT_EN */
+	imx_iomux_v3_setup_pad(IOMUX_LCD_VDD_EN | MUX_PAD_CTRL(NO_PAD_CTRL)); /* LCD_VDD_EN */
+#else
 	imx_iomux_v3_setup_pad(IOMUX_LCD_BKLT_PWM); /* LCD_BKLT_PWM */
 	imx_iomux_v3_setup_pad(IOMUX_LCD_BKLT_EN); /* LCD_BKLT_EN */
 	imx_iomux_v3_setup_pad(IOMUX_LCD_VDD_EN); /* LCD_VDD_EN */
+#endif
 
 	/* LCD_BKLT_PWM - disable pwm */
 	gpio_direction_output(LCD_BKLT_PWM, 0);
@@ -1005,15 +1077,44 @@ void setup_lvds_init(void)
 #else
 	gpio_direction_output(LCD_VDD_EN, 0);
 #endif
+
+#ifdef CONFIG_ADV_UBOOT_LOGO_DEBUG
+	printf("ADV UBOOT LOGO setup_lvds_init \n");
+#endif
+}
+
+#ifdef CONFIG_ADV_UBOOT_LOGO
+void setup_lvds_poweron(void)
+{
+	//LCD_BKLT_EN
+	gpio_direction_output(LCD_BKLT_EN, 1);
+	gpio_set_value(LCD_BKLT_EN,1);
+
+	//LCD_VDD_EN
+	gpio_direction_output(LCD_VDD_EN, 1);
+	gpio_set_value(LCD_VDD_EN,1);
+
+	gpio_direction_output(LCD_BKLT_PWM, 1);
+	gpio_set_value(LCD_BKLT_PWM,1);
 }
+#endif // #ifdef CONFIG_ADV_UBOOT_LOGO
 
 #endif
 int board_init(void)
 {
+#ifdef CONFIG_ADV_UBOOT_LOGO
+       printf("ADV UBOOT LOGO board_init() \n");
+#endif
+
 	/* address of boot parameters */
 	gd->bd->bi_boot_params = PHYS_SDRAM + 0x100;
 #if defined (CONFIG_ADVANTECH) && defined(CONFIG_SUPPORT_LVDS)
        setup_lvds_init();
+
+#ifdef CONFIG_ADV_UBOOT_LOGO
+       setup_lvds_poweron();
+#endif
+
 #endif
 #ifdef CONFIG_MXC_SPI
 	setup_spi();
diff --git a/drivers/video/cfb_console.c b/drivers/video/cfb_console.c
index 8f552cd..dcc2f68 100644
--- a/drivers/video/cfb_console.c
+++ b/drivers/video/cfb_console.c
@@ -311,6 +311,19 @@ extern void video_get_info_str(int line_number,	char *info);
 
 DECLARE_GLOBAL_DATA_PTR;
 
+#ifdef CONFIG_ADV_UBOOT_LOGO_EMMC
+#include <mmc.h>
+#include <common.h>
+#include <asm/ioNew.h>
+
+#define UBOOT_LOGO_BMP_ADDR 0x00100000
+#define DISPLAY_WIDTH 800
+#define DISPLAY_HEIGHT 480
+#define DISPLAY_BPP 16
+//#define CONFIG_FB_BASE (CONFIG_SYS_TEXT_BASE + 0x300000)
+#define CONFIG_FB_BASE VIDEO_FB_ADRS
+#endif
+
 /* Locals */
 static GraphicDevice *pGD;	/* Pointer to Graphic array */
 
@@ -1953,7 +1966,9 @@ static void *video_logo(void)
 	}
 #endif /* CONFIG_SPLASH_SCREEN */
 
+#ifndef CONFIG_ADV_UBOOT_LOGO_EMMC
 	logo_plot(video_fb_address, video_logo_xpos, video_logo_ypos);
+#endif
 
 #ifdef CONFIG_SPLASH_SCREEN_ALIGN
 	/*
@@ -2090,6 +2105,14 @@ void video_clear(void)
 #endif
 }
 
+#ifdef CONFIG_ADV_UBOOT_LOGO_EMMC
+int get_mmc_env_devno(void)
+{
+	uint soc_sbmr = readl(SRC_BASE_ADDR + 0x4);
+	return (soc_sbmr & 0x00001800) >> 11;
+}
+#endif
+
 static int video_init(void)
 {
 	unsigned char color8;
@@ -2108,6 +2131,9 @@ static int video_init(void)
 	/* Init drawing pats */
 	switch (VIDEO_DATA_FORMAT) {
 	case GDF__8BIT_INDEX:
+#ifdef CONFIG_ADV_UBOOT_LOGO_DEBUG
+		printf("Video: GDF__8BIT_INDEX ...\n");
+#endif
 		video_set_lut(0x01, CONSOLE_FG_COL, CONSOLE_FG_COL,
 			      CONSOLE_FG_COL);
 		video_set_lut(0x00, CONSOLE_BG_COL, CONSOLE_BG_COL,
@@ -2116,6 +2142,9 @@ static int video_init(void)
 		bgx = 0x00000000;
 		break;
 	case GDF__8BIT_332RGB:
+#ifdef CONFIG_ADV_UBOOT_LOGO_DEBUG
+		printf("Video: GDF__8BIT_332RGB ...\n");
+#endif
 		color8 = ((CONSOLE_FG_COL & 0xe0) |
 			  ((CONSOLE_FG_COL >> 3) & 0x1c) |
 			  CONSOLE_FG_COL >> 6);
@@ -2128,6 +2157,9 @@ static int video_init(void)
 			color8;
 		break;
 	case GDF_15BIT_555RGB:
+#ifdef CONFIG_ADV_UBOOT_LOGO_DEBUG
+		printf("Video: GDF_15BIT_555RGB ...\n");
+#endif
 		fgx = (((CONSOLE_FG_COL >> 3) << 26) |
 		       ((CONSOLE_FG_COL >> 3) << 21) |
 		       ((CONSOLE_FG_COL >> 3) << 16) |
@@ -2142,6 +2174,9 @@ static int video_init(void)
 			(CONSOLE_BG_COL >> 3));
 		break;
 	case GDF_16BIT_565RGB:
+#ifdef CONFIG_ADV_UBOOT_LOGO_DEBUG
+		printf("Video: GDF_16BIT_565RGB ...\n");
+#endif
 		fgx = (((CONSOLE_FG_COL >> 3) << 27) |
 		       ((CONSOLE_FG_COL >> 2) << 21) |
 		       ((CONSOLE_FG_COL >> 3) << 16) |
@@ -2156,6 +2191,9 @@ static int video_init(void)
 			(CONSOLE_BG_COL >> 3));
 		break;
 	case GDF_32BIT_X888RGB:
+#ifdef CONFIG_ADV_UBOOT_LOGO_DEBUG
+		printf("Video: GDF_32BIT_X888RGB ...\n");
+#endif
 		fgx =	(CONSOLE_FG_COL << 16) |
 			(CONSOLE_FG_COL <<  8) |
 			 CONSOLE_FG_COL;
@@ -2164,6 +2202,9 @@ static int video_init(void)
 			 CONSOLE_BG_COL;
 		break;
 	case GDF_24BIT_888RGB:
+#ifdef CONFIG_ADV_UBOOT_LOGO_DEBUG
+		printf("Video: GDF_24BIT_888RGB ...\n");
+#endif
 		fgx =	(CONSOLE_FG_COL << 24) |
 			(CONSOLE_FG_COL << 16) |
 			(CONSOLE_FG_COL <<  8) |
@@ -2182,6 +2223,87 @@ static int video_init(void)
 	/* Plot the logo and get start point of console */
 	debug("Video: Drawing the logo ...\n");
 	video_console_address = video_logo();
+
+#ifdef CONFIG_ADV_UBOOT_LOGO_EMMC
+   unsigned int size = DISPLAY_WIDTH * DISPLAY_HEIGHT * (DISPLAY_BPP / 8);
+   unsigned char * pData;
+   unsigned int start, count;
+   int i, bmpReady = 0;
+   int mmc_dev = get_mmc_env_devno();
+
+#ifdef CONFIG_ADV_UBOOT_LOGO_DEBUG
+   printf("mmc_dev:%d\n", mmc_dev);
+#endif
+
+   struct mmc *mmc = find_mmc_device(mmc_dev);
+
+   pData = (unsigned char *)CONFIG_FB_BASE;
+
+   if (mmc){
+	   if (mmc_init(mmc) == 0) {
+		   start = ALIGN(UBOOT_LOGO_BMP_ADDR, mmc->read_bl_len) / mmc->read_bl_len;
+		   count = ALIGN(size, mmc->read_bl_len) / mmc->read_bl_len;
+		   mmc->block_dev.block_read(&mmc->block_dev, start, count, pData);
+
+#ifdef CONFIG_ADV_UBOOT_LOGO_DEBUG
+		   printf("start %x \n" ,start);
+		   printf("mmc->read_bl_len %x \n" ,mmc->read_bl_len);
+		   printf("count %x \n" ,count);
+#endif
+		   bmpReady = 1;
+//		   for(i=0;i<count;i++)
+//			   printf("0x%x ",pData[i]);
+//		   printf("\n");
+#ifdef CONFIG_ADV_UBOOT_LOGO_DEBUG
+		   printf("Display emmc logo !!! \n");
+		   printf("DISPLAY_BPP %d !!! \n",DISPLAY_BPP);
+#endif
+	   }
+   }
+		
+	//printf("display r g b !!! \n");
+	//bmpReady = 0;
+	//r g b bpp is 16,is ok
+    if (bmpReady == 0) {
+	   // Fill RGB frame buffer
+	   // Red
+	   for (i = 0; i < (DISPLAY_WIDTH * DISPLAY_HEIGHT * (DISPLAY_BPP / 8) / 3); i += (DISPLAY_BPP / 8)) {
+#if (DISPLAY_BPP == 16)
+		   pData[i + 0] = 0x00;
+		   pData[i + 1] = 0xF8;
+#else
+		   pData[i + 0] = 0x00;
+		   pData[i + 1] = 0x00;
+		   pData[i + 2] = 0xFF;
+#endif
+        }
+
+	   // Green
+	   for (; i < (DISPLAY_WIDTH * DISPLAY_HEIGHT * (DISPLAY_BPP / 8) / 3) * 2; i += (DISPLAY_BPP / 8)) {
+#if (DISPLAY_BPP == 16)
+		   pData[i + 0] = 0xE0;
+		   pData[i + 1] = 0x07;
+#else
+		   pData[i + 0] = 0x00;
+		   pData[i + 1] = 0xFF;
+		   pData[i + 2] = 0x00;
+#endif
+        }
+
+	   // Blue
+	   for (; i < DISPLAY_WIDTH * DISPLAY_HEIGHT * (DISPLAY_BPP / 8); i += (DISPLAY_BPP / 8)) {
+#if (DISPLAY_BPP == 16)
+		   pData[i + 0] = 0x1F;
+		   pData[i + 1] = 0x00;
+#else
+		   pData[i + 0] = 0xFF;
+		   pData[i + 1] = 0x00;
+		   pData[i + 2] = 0x00;
+#endif
+        }
+    }
+#endif //#ifdef CONFIG_ADV_UBOOT_LOGO_EMMC
+
 #else
 	video_console_address = video_fb_address;
 #endif
diff --git a/include/configs/mx6advantech_common.h b/include/configs/mx6advantech_common.h
index 56f3595..d823ff9 100644
--- a/include/configs/mx6advantech_common.h
+++ b/include/configs/mx6advantech_common.h
@@ -51,6 +51,10 @@
 #define CONFIG_PHYLIB
 #define CONFIG_PHY_ATHEROS
 
+#define CONFIG_ADV_UBOOT_LOGO
+#define CONFIG_ADV_UBOOT_LOGO_EMMC
+/* #define CONFIG_ADV_UBOOT_LOGO_DEBUG */
+
 /* Command definition */
 #define CONFIG_CMD_BMODE
 
@@ -409,6 +413,33 @@
 #define CONFIG_SYS_I2C_MXC_I2C3		/* enable I2C bus 3 */
 #define CONFIG_SYS_I2C_SPEED		  100000
 
+#ifdef CONFIG_ADV_UBOOT_LOGO
+#ifdef CONFIG_ADVANTECH
+
+/* Framebuffer */
+#define CONFIG_VIDEO
+#define CONFIG_VIDEO_IPUV3
+#define CONFIG_CFB_CONSOLE
+#define CONFIG_VGA_AS_SINGLE_DEVICE
+#define CONFIG_SYS_CONSOLE_IS_IN_ENV
+#define CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE
+#define CONFIG_VIDEO_BMP_RLE8
+#define CONFIG_SPLASH_SCREEN
+#define CONFIG_SPLASH_SCREEN_ALIGN
+#define CONFIG_BMP_16BPP
+#define CONFIG_VIDEO_LOGO
+#define CONFIG_VIDEO_BMP_LOGO
+#ifdef CONFIG_MX6DL
+#define CONFIG_IPUV3_CLK 198000000
+#else
+#define CONFIG_IPUV3_CLK 264000000
+#endif
+#define CONFIG_IMX_HDMI
+#define CONFIG_IMX_VIDEO_SKIP
+#endif /* #ifdef CONFIG_ADVANTECH */
+
+#endif /* #ifdef CONFIG_ADV_UBOOT_LOGO */
+
 #if defined(CONFIG_ANDROID_SUPPORT)
 #include "mx6sabreandroid_common.h"
 #else
-- 
2.7.4

