Xingxing.li at 06:58, 18 March 2026

2026-03-18T06:58:31Z

Xingxing.li: Created page with " === '''5G''' === AOM-3841 supports RM520NGLAA(PCIe ,Advantech PN: 968DD00342).
First set M.2_B-KEY to PCIe Mode:

# fw_setenv combphy1 pcie # reboot

=== '''M..."

2026-03-18T06:12:58Z

Created page with " === '''5G''' === AOM-3841 supports RM520NGLAA(PCIe ,Advantech PN: 968DD00342).<br/> First set M.2_B-KEY to PCIe Mode: <pre># fw_setenv combphy1 pcie # reboot</pre> === '''M..."

New page

=== '''5G''' ===

AOM-3841 supports RM520NGLAA(PCIe ,Advantech PN: 968DD00342).<br/> First set M.2_B-KEY to PCIe Mode:
<pre># fw_setenv combphy1 pcie
# reboot</pre>

=== '''M.2_B Key Pin define''' ===

{| border="1" cellpadding="1" cellspacing="1"
|-
| colspan="4" | '''M.2_B  M.2_B Connector Pin Definition'''
|-
| style="width: 42px;" | '''Pin'''
| style="width: 166px;" | '''Signal '''
| style="width: 40px;" | '''1/O'''
| style="width: 971px;" | '''Description'''
|-
| style="width: 42px;" | 1
| style="width: 166px;" | GND(Default NC)
| style="width: 40px;" |  
| style="width: 971px;" | Ground
|-
| style="width: 42px;" | 2
| style="width: 166px;" | +V3.3B_M.2
| style="width: 40px;" |  
| style="width: 971px;" | 3.3V source
|-
| style="width: 42px;" | 3
| style="width: 166px;" | GND
| style="width: 40px;" |  
| style="width: 971px;" | Ground
|-
| style="width: 42px;" | 4
| style="width: 166px;" | +V3.3B_M.2
| style="width: 40px;" |  
| style="width: 971px;" | 3.3V source
|-
| style="width: 42px;" | 5
| style="width: 166px;" | GND
| style="width: 40px;" |  
| style="width: 971px;" | Ground
|-
| style="width: 42px;" | 6
| style="width: 166px;" | BKEY_PWR_Z_OFF
| style="width: 40px;" | I
| style="width: 971px;" | Active Low. A single control to turn Off WWAN solution
|-
| style="width: 42px;" | 7
| style="width: 166px;" | BKEY_USB_D+
| style="width: 40px;" | O
| style="width: 971px;" | USB Data + Differential Signal.
|-
| style="width: 42px;" | 8
| style="width: 166px;" | BKEY_W_DISABLE1#
| style="width: 40px;" | O
| style="width: 971px;" | Aactive Low,when applied by the system it will disable radio operation on the Adapter that implement radio frequency applications.
|-
| style="width: 42px;" | 9
| style="width: 166px;" | BKEY_USB_D-
| style="width: 40px;" | I/O
| style="width: 971px;" | USB Data - Differential Signal.
|-
| style="width: 42px;" | 10
| style="width: 166px;" | LED1#_M2_B
| style="width: 40px;" | O
| style="width: 971px;" | The Adapters’ status indicators via LED devices.
|-
| style="width: 42px;" | 11
| style="width: 166px;" | GND
| style="width: 40px;" |  
| style="width: 971px;" | Ground
|-
| style="width: 42px;" | 12-19
| style="width: 166px;" | Moudle Key
| style="width: 40px;" |  
| style="width: 971px;" | Moudle Key
|-
| style="width: 42px;" | 20
| style="width: 166px;" | N/A
| style="width: 40px;" |  
| style="width: 971px;" | Not Applicable
|-
| style="width: 42px;" | 21
| style="width: 166px;" | GND
| style="width: 40px;" |  
| style="width: 971px;" | Ground
|-
| style="width: 42px;" | 22
| style="width: 166px;" | N/A
| style="width: 40px;" |  
| style="width: 971px;" | Not Applicable
|-
| style="width: 42px;" | 23
| style="width: 166px;" | BKEY_WOWWAN#_GPIO
| style="width: 40px;" | O
| style="width: 971px;" | Used to wake the Platform by the WWAN device
|-
| style="width: 42px;" | 24
| style="width: 166px;" | N/A
| style="width: 40px;" |  
| style="width: 971px;" | Not Applicable
|-
| style="width: 42px;" | 25
| style="width: 166px;" | BKEY_DPR_1.8
| style="width: 40px;" | O
| style="width: 971px;" | This signal is an input directly to the WWAN Adapter from a suitable SAR sensor.
|-
| style="width: 42px;" | 26
| style="width: 166px;" | BKEY_W_DISABLE2#
| style="width: 40px;" | O
| style="width: 971px;" | Aactive Low,when applied by the system it will disable radio operation on the Adapter that implement radio frequency applications.
|-
| style="width: 42px;" | 27
| style="width: 166px;" | GND
| style="width: 40px;" |  
| style="width: 971px;" | Ground
|-
| style="width: 42px;" | 28
| style="width: 166px;" | N/A
| style="width: 40px;" |  
| style="width: 971px;" | Not Applicable
|-
| style="width: 42px;" | 29
| style="width: 166px;" | BKEY_USB3.0_RX-
| style="width: 40px;" | I/O
| style="width: 971px;" | USB3.0 RX - Differential signal.
|-
| style="width: 42px;" | 30
| style="width: 166px;" | UIM_RESET
| style="width: 40px;" | I
| style="width: 971px;" | UIM reset signal.
|-
| style="width: 42px;" | 31
| style="width: 166px;" | BKEY_USB3.0_RX+
| style="width: 40px;" | I/O
| style="width: 971px;" | USB3.0 RX+ Differential signal.
|-
| style="width: 42px;" | 32
| style="width: 166px;" | UIM_CLK
| style="width: 40px;" | I
| style="width: 971px;" | UIM clock signal.
|-
| style="width: 42px;" | 33
| style="width: 166px;" | GND
| style="width: 40px;" |  
| style="width: 971px;" | Ground
|-
| style="width: 42px;" | 34
| style="width: 166px;" | UIM_DATA
| style="width: 40px;" | I/O
| style="width: 971px;" | UIM data signal.
|-
| style="width: 42px;" | 35
| style="width: 166px;" | BKEY_USB3.0_TX-
| style="width: 40px;" | I/O
| style="width: 971px;" | USB3.0 TX - Differential signal.
|-
| style="width: 42px;" | 36
| style="width: 166px;" | UIM_VCC
| style="width: 40px;" | I
| style="width: 971px;" | Power source for the UIM.
|-
| style="width: 42px;" | 37
| style="width: 166px;" | BKEY_USB3.0_TX+
| style="width: 40px;" | I/O
| style="width: 971px;" | USB3.0 TX + Differential signal.
|-
| style="width: 42px;" | 38
| style="width: 166px;" | N/A
| style="width: 40px;" |  
| style="width: 971px;" | Not Applicable
|-
| style="width: 42px;" | 39
| style="width: 166px;" | GND
| style="width: 40px;" |  
| style="width: 971px;" | Ground
|-
| style="width: 42px;" | 40
| style="width: 166px;" | N/A
| style="width: 40px;" |  
| style="width: 971px;" | Not Applicable
|-
| style="width: 42px;" | 41
| style="width: 166px;" | BKEY_PERN0
| style="width: 40px;" | O
| style="width: 971px;" | PCIe RX - Differential signal.
|-
| style="width: 42px;" | 42
| style="width: 166px;" | N/A
| style="width: 40px;" |  
| style="width: 971px;" | Not Applicable
|-
| style="width: 42px;" | 43
| style="width: 166px;" | BKEY_PERP0
| style="width: 40px;" | O
| style="width: 971px;" | PCIe RX + Differential signal.
|-
| style="width: 42px;" | 44
| style="width: 166px;" | N/A
| style="width: 40px;" |  
| style="width: 971px;" | Not Applicable
|-
| style="width: 42px;" | 45
| style="width: 166px;" | GND
| style="width: 40px;" |  
| style="width: 971px;" | Ground
|-
| style="width: 42px;" | 46
| style="width: 166px;" | N/A
| style="width: 40px;" |  
| style="width: 971px;" | Not Applicable
|-
| style="width: 42px;" | 47
| style="width: 166px;" | BKEY_PETN0
| style="width: 40px;" | I
| style="width: 971px;" | PCIe TX - Differential signal.
|-
| style="width: 42px;" | 48
| style="width: 166px;" | N/A
| style="width: 40px;" |  
| style="width: 971px;" | Not Applicable
|-
| style="width: 42px;" | 49
| style="width: 166px;" | BKEY_PETP0
| style="width: 40px;" | I
| style="width: 971px;" | PCIe TX + Differential signal.
|-
| style="width: 42px;" | 50
| style="width: 166px;" | BKEY_PERST#
| style="width: 40px;" | I
| style="width: 971px;" | Active Low.PCIe Reset is a functional reset to the card.
|-
| style="width: 42px;" | 51
| style="width: 166px;" | GND
| style="width: 40px;" |  
| style="width: 971px;" | Ground
|-
| style="width: 42px;" | 52
| style="width: 166px;" | BKEY_CLKREQ#
| style="width: 40px;" | I/O
| style="width: 971px;" | Active Low.PCIe Clock Request is a reference clock request signal.
|-
| style="width: 42px;" | 53
| style="width: 166px;" | BKEY_PCIE_CLK-
| style="width: 40px;" | I
| style="width: 971px;" | PCIe Reference Clock signals (100 MHz)
|-
| style="width: 42px;" | 54
| style="width: 166px;" | BKEY_PEWAKE#
| style="width: 40px;" | I/O
| style="width: 971px;" |
Active Low. When the Adapter supports wakeup, this signal is used to request that the system return from asleep/suspend state to service a  function-initiated wake event.

|-
| style="width: 42px;" | 55
| style="width: 166px;" | BKEY_PCIE_CLK+
| style="width: 40px;" | I
| style="width: 971px;" | PCIe Reference Clock signals (100 MHz)
|-
| style="width: 42px;" | 56
| style="width: 166px;" | N/A
| style="width: 40px;" |  
| style="width: 971px;" | Not Applicable
|-
| style="width: 42px;" | 57
| style="width: 166px;" | GND
| style="width: 40px;" |  
| style="width: 971px;" | Ground
|-
| style="width: 42px;" | 58
| style="width: 166px;" | N/A
| style="width: 40px;" |  
| style="width: 971px;" | Not Applicable
|-
| style="width: 42px;" | 59
| style="width: 166px;" | N/A
| style="width: 40px;" |  
| style="width: 971px;" | Not Applicable
|-
| style="width: 42px;" | 60
| style="width: 166px;" | N/A
| style="width: 40px;" |  
| style="width: 971px;" | Not Applicable
|-
| style="width: 42px;" | 61
| style="width: 166px;" | N/A
| style="width: 40px;" |  
| style="width: 971px;" | Not Applicable
|-
| style="width: 42px;" | 62
| style="width: 166px;" | N/A
| style="width: 40px;" |  
| style="width: 971px;" | Not Applicable
|-
| style="width: 42px;" | 63
| style="width: 166px;" | N/A
| style="width: 40px;" |  
| style="width: 971px;" | Not Applicable
|-
| style="width: 42px;" | 64
| style="width: 166px;" | N/A
| style="width: 40px;" |  
| style="width: 971px;" | Not Applicable
|-
| style="width: 42px;" | 65
| style="width: 166px;" | N/A
| style="width: 40px;" |  
| style="width: 971px;" | Not Applicable
|-
| style="width: 42px;" | 66
| style="width: 166px;" | N/A
| style="width: 40px;" |  
| style="width: 971px;" | Not Applicable
|-
| style="width: 42px;" | 67
| style="width: 166px;" | BKEY_RESET#
| style="width: 40px;" | I
| style="width: 971px;" | Active Low.The single control to Reset the WWAN solution.
|-
| style="width: 42px;" | 68
| style="width: 166px;" | BKEY_CLK
| style="width: 40px;" | I
| style="width: 971px;" | 32.768 kHz clock supply input that is provided by the Platform chipset to reduce power and cost for the Adapter.
|-
| style="width: 42px;" | 69
| style="width: 166px;" | GND(Default NC)
| style="width: 40px;" |  
| style="width: 971px;" | Ground
|-
| style="width: 42px;" | 70
| style="width: 166px;" | +V3.3B_M.2
| style="width: 40px;" |  
| style="width: 971px;" | 3.3 V source
|-
| style="width: 42px;" | 71
| style="width: 166px;" | GND
| style="width: 40px;" |  
| style="width: 971px;" | Ground
|-
| style="width: 42px;" | 72
| style="width: 166px;" | +V3.3B_M.2
| style="width: 40px;" |  
| style="width: 971px;" | 3.3 V source
|-
| style="width: 42px;" | 73
| style="width: 166px;" | GND
| style="width: 40px;" |  
| style="width: 971px;" | Ground
|-
| style="width: 42px;" | 74
| style="width: 166px;" | +V3.3B_M.2
| style="width: 40px;" |  
| style="width: 971px;" | 3.3 V source
|-
| style="width: 42px;" | 75
| style="width: 166px;" | GND(Default NC)
| style="width: 40px;" |  
| style="width: 971px;" | Ground
|}

[[File:AOM-DB3500 M.2 B key.png|700x600px|AOM-DB3500 M.2 B key.png]][[File:AOM-DB3500 M.2 B key pin define.png|RTENOTITLE]]

=== '''Configure 5G''' ===

1、Power off the device, then insert 5G module and SIM card.

Note：Make sure the device is power off before insert 4G/5G module and SIM card, otherwise the device, 4G/5G module and/or SIM card may be damaged.

2、Power on the device, Click network connection icon 

[[File:AFE-E630 4G EC20 1.png|RTENOTITLE]]

Then choose “New Mobile Broadband connection”.

[[File:AFE-E630 4G EC20 2.png|RTENOTITLE]]

then you will see the following window, click "Next" button to the next step.

[[File:RK3288 Debian 4G setup.png|550px|RTENOTITLE]]

3、Choose Provider's country or region of the SIM card you insert in STEP0.

[[File:RK3288 Debian 4G Provider Country.png|550px|RTENOTITLE]]

4、Choose or Set the Provider's name.

[[File:ROM-6881 4G Providers name.png|550x300px|ROM-6881 4G Providers name.png]]

4、Choose or Set the Provider's name.

[[File:ROM-6881 4G APN.png|550x300px|ROM-6881 4G APN.png]]

5、Choose or Set APN.

[[File:ROM-6881 4G APN.png|550x300px|ROM-6881 4G APN.png]]

6、Confirm your config and finish.

[[File:ROM-6881 4G finish.png|550x300px|ROM-6881 4G finish.png]]

After connection, 4Gwill create a net point “wwan0”

 

AOM-3841 M.2 B Key——5G（PCIE型） - Revision history

Xingxing.li at 06:58, 18 March 2026

Xingxing.li: Created page with " === '''5G''' === AOM-3841 supports RM520NGLAA(PCIe ,Advantech PN: 968DD00342).
First set M.2_B-KEY to PCIe Mode:
# fw_setenv combphy1 pcie # reboot
=== '''M..."

@@ Line 361: / Line 361: @@
 [[File:AOM-DB3500 M.2 B key.png|700x600px|AOM-DB3500 M.2 B key.png]][[File:AOM-DB3500 M.2 B key pin define.png|RTENOTITLE]]
 === '''Configure 5G''' ===
@@ Line 402: / Line 403: @@
 After connection, 4Gwill create a net point “wwan0”
-&nbsp;
+[[File:AOM-3841 5G PCIE.png]]

AOM-3841 M.2 B Key——5G（PCIE型） - Revision history

Xingxing.li at 06:58, 18 March 2026

Xingxing.li: Created page with " === '''5G''' === AOM-3841 supports RM520NGLAA(PCIe ,Advantech PN: 968DD00342). First set M.2_B-KEY to PCIe Mode: # fw_setenv combphy1 pcie # reboot === '''M..."

Xingxing.li: Created page with " === '''5G''' === AOM-3841 supports RM520NGLAA(PCIe ,Advantech PN: 968DD00342).
First set M.2_B-KEY to PCIe Mode:
# fw_setenv combphy1 pcie # reboot
=== '''M..."