Difference between revisions of "IoTGateway/BSP/Linux/AM335x/Hardware module/LCD Module"

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(LVDS timing setting on SDK version 1)
(LVDS timing setting on SDK version 1)
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database is stored in linux-3.2.0/drivers/video/da8xx-fb.c. You can add a new one
 
database is stored in linux-3.2.0/drivers/video/da8xx-fb.c. You can add a new one
 
for your LVDS panel.
 
for your LVDS panel.
 +
<pre>
 +
static struct da8xx_panel known_lcd_panels[] = {
 +
{
 +
.name = "TFC_S9700RTWV35TR_01B",
 +
.width = 800,
 +
.height = 480,
 +
.hfp = 127,
 +
.hbp = 127,
 +
.hsw = 2,
 +
.vfp = 22,
 +
.vbp = 22,
 +
.vsw = 1,
 +
.pxl_clk = 20000000,
 +
.invert_pxl_clk = 0,
 +
},
 +
}
 +
</pre>
 +
The definition of da8xx_panel in linux-3.2.0/ drivers/video/da8xx-fb.c:
 +
The name field is optional. If you input this value, it can be used in U-Boot
 +
environment settings.
 +
The refresh field is the screen refresh frame rate, such as 60Hz, 70Hz. The
 +
resolution can be filled in the xres & yres fields.
 +
The pixel clock (pixclock) is equaled to 10ʌ12 /(Total horizontal line * Total vertical
 +
line * DCLK). For example, the total horizontal line is 1344 DCLK, and total
 +
vertical number is 806 horizontal lines. The frame rate is 60 MHz.
 +
Therefore, we can get 10 12 /(1344*806*60) = 15385.<br>
 +
The margin values can be seen as front porch & back porch.<br>
 +
The sync_len means pulse width.<br>
 +
The sync value indicates the sync polarity (low or high).<br>
 +
<pre>
 +
struct da8xx_panel {
 +
const char
 +
name[25];
 +
/* Full name <vendor>_<model> */
 +
unsigned short width;
 +
unsigned short height;
 +
int      hfp;  /* Horizontal front porch*/
 +
int      hbp;  /* Horizontal back porch*/
 +
int      hsw;  /* Horizontal Sync Pulse Width*/
 +
int      vfp;  /* Vertical front porch*/
 +
int      vbp;  /* Vertical back porch*/
 +
int      vsw; /* ertical Sync Pulse Width*/
 +
unsigned int pxl_clk;  /* Pixel clock*/
 +
unsigned charinvert_pxl_clk;  /* Invert Pixel clock */
 +
};
 +
</pre>
  
 
= VGA Timing setting on SDK version 1=
 
= VGA Timing setting on SDK version 1=

Revision as of 06:26, 28 September 2016

LVDS timing setting on SDK version 1

  • Add timing structure into dispaly driver

LDB-XGA is an example for the resolution of your LVDS panel. You can input the actual resolution of your LVDS panel here, such as 800x480, 1024x768, etc. The system will accomplish the corresponding parameters automatically. If the panel has problem to be activated, you may need to check the panel datasheet to configure the panel related parameters. The LVDS video mode database is stored in linux-3.2.0/drivers/video/da8xx-fb.c. You can add a new one for your LVDS panel.

static struct da8xx_panel known_lcd_panels[] = {
{
.name = "TFC_S9700RTWV35TR_01B",
.width = 800,
.height = 480,
.hfp = 127,
.hbp = 127,
.hsw = 2,
.vfp = 22,
.vbp = 22,
.vsw = 1,
.pxl_clk = 20000000,
.invert_pxl_clk = 0,
},
}

The definition of da8xx_panel in linux-3.2.0/ drivers/video/da8xx-fb.c: The name field is optional. If you input this value, it can be used in U-Boot environment settings. The refresh field is the screen refresh frame rate, such as 60Hz, 70Hz. The resolution can be filled in the xres & yres fields. The pixel clock (pixclock) is equaled to 10ʌ12 /(Total horizontal line * Total vertical line * DCLK). For example, the total horizontal line is 1344 DCLK, and total vertical number is 806 horizontal lines. The frame rate is 60 MHz. Therefore, we can get 10 12 /(1344*806*60) = 15385.
The margin values can be seen as front porch & back porch.
The sync_len means pulse width.
The sync value indicates the sync polarity (low or high).

struct da8xx_panel {
const char
name[25];
/* Full name <vendor>_<model> */
unsigned short width;
unsigned short height;
int      hfp;  /* Horizontal front porch*/
int      hbp;  /* Horizontal back porch*/
int      hsw;  /* Horizontal Sync Pulse Width*/
int      vfp;  /* Vertical front porch*/
int      vbp;  /* Vertical back porch*/
int      vsw; /* ertical Sync Pulse Width*/
unsigned int pxl_clk;  /* Pixel clock*/
unsigned charinvert_pxl_clk;  /* Invert Pixel clock */
};

VGA Timing setting on SDK version 1