View source for AOM-DB3500 M.2 E1 Key——PCIE/SATA


=== '''AOM-3821 supports three PCIE ports.&nbsp;''' ===

Using the PCIE disk (SQF-C8BV2-128G-EDE) to test the M.2_B-Key PCIE interface.<br/> Using the WIFI module (EWM-W179M201E) to test the M.2_E-Key PCIE interface.<br/> Using NVMe (UGREEN KB-SA0093-A1 + JZ-SSD256G-5) to test PCIEX4 interface.

=== '''M2_E1 Key Pin define''' ===

{| border="1" cellpadding="1" cellspacing="1" style="width: 780px;"
|-
| colspan="4" style="width: 770px;" | '''M2_E1 M2_E1 Connector Pin Definition'''
|-
| style="width: 41px;" | '''Pin'''
| style="width: 182px;" | '''Signal'''
| style="width: 60px;" | '''I/O'''
| style="width: 474px;" | '''Description'''
|-
| style="width: 41px;" | 1
| style="width: 182px;" | GND
| style="width: 60px;" | &nbsp;
| style="width: 474px;" | Ground
|-
| style="width: 41px;" | 2
| style="width: 182px;" | +V3.3E_M.2
| style="width: 60px;" | &nbsp;
| style="width: 474px;" | 3.3 V source
|-
| style="width: 41px;" | 3
| style="width: 182px;" | USB5_Z_D+
| style="width: 60px;" | I/O
| style="width: 474px;" | USB Data + Differential serial data
|-
| style="width: 41px;" | 4
| style="width: 182px;" | +V3.3E_M.2
| style="width: 60px;" | &nbsp;
| style="width: 474px;" | 3.3 V source
|-
| style="width: 41px;" | 5
| style="width: 182px;" | USB5_Z_D-
| style="width: 60px;" | I/O
| style="width: 474px;" | USB Data - Differential serial data
|-
| style="width: 41px;" | 6
| style="width: 182px;" | LED1#_M2
| style="width: 60px;" | O
| style="width: 474px;" | The Adapters’ status indicators via LED devices.
|-
| style="width: 41px;" | 7
| style="width: 182px;" | GND
| style="width: 60px;" | &nbsp;
| style="width: 474px;" | Ground
|-
| style="width: 41px;" | 8
| style="width: 182px;" | N/A
| style="width: 60px;" | &nbsp;
| style="width: 474px;" | Not Applicable
|-
| style="width: 41px;" | 9
| style="width: 182px;" | N/A
| style="width: 60px;" | &nbsp;
| style="width: 474px;" | Not Applicable
|-
| style="width: 41px;" | 10
| style="width: 182px;" | N/A
| style="width: 60px;" | &nbsp;
| style="width: 474px;" | Not Applicable
|-
| style="width: 41px;" | 11
| style="width: 182px;" | N/A
| style="width: 60px;" | &nbsp;
| style="width: 474px;" | Not Applicable
|-
| style="width: 41px;" | 12
| style="width: 182px;" | N/A
| style="width: 60px;" | &nbsp;
| style="width: 474px;" | Not Applicable
|-
| style="width: 41px;" | 13
| style="width: 182px;" | N/A
| style="width: 60px;" | &nbsp;
| style="width: 474px;" | Not Applicable
|-
| style="width: 41px;" | 14
| style="width: 182px;" | N/A
| style="width: 60px;" | &nbsp;
| style="width: 474px;" | Not Applicable
|-
| style="width: 41px;" | 15
| style="width: 182px;" | N/A
| style="width: 60px;" | &nbsp;
| style="width: 474px;" | Not Applicable
|-
| style="width: 41px;" | 16
| style="width: 182px;" | LED2#_M2
| style="width: 60px;" | O
| style="width: 474px;" | The Adapters’ status indicators via LED devices.
|-
| style="width: 41px;" | 17
| style="width: 182px;" | N/A
| style="width: 60px;" | &nbsp;
| style="width: 474px;" | Not Applicable
|-
| style="width: 41px;" | 18
| style="width: 182px;" | GND
| style="width: 60px;" | &nbsp;
| style="width: 474px;" | Ground
|-
| style="width: 41px;" | 19
| style="width: 182px;" | N/A
| style="width: 60px;" | &nbsp;
| style="width: 474px;" | Not Applicable
|-
| style="width: 41px;" | 20
| style="width: 182px;" | UART1_E1_WAKE#
| style="width: 60px;" | O
| style="width: 474px;" | UART sideband used to Wake up Platform.
|-
| style="width: 41px;" | 21
| style="width: 182px;" | N/A
| style="width: 60px;" | &nbsp;
| style="width: 474px;" | Not Applicable
|-
| style="width: 41px;" | 22
| style="width: 182px;" | SER1_RX_M2
| style="width: 60px;" | O
| style="width: 474px;" | UART Receive Data
|-
| style="width: 41px;" | 23
| style="width: 182px;" | N/A
| style="width: 60px;" | &nbsp;
| style="width: 474px;" | Not Applicable
|-
| style="width: 41px;" | 24-31
| style="width: 182px;" | Module key
| style="width: 60px;" | &nbsp;
| style="width: 474px;" | Module key
|-
| style="width: 41px;" | 32
| style="width: 182px;" | SER1_TX_M2
| style="width: 60px;" | I
| style="width: 474px;" | UART Transmit Data
|-
| style="width: 41px;" | 33
| style="width: 182px;" | GND
| style="width: 60px;" | &nbsp;
| style="width: 474px;" | Ground
|-
| style="width: 41px;" | 34
| style="width: 182px;" | SER1_CTS#_M2
| style="width: 60px;" | O
| style="width: 474px;" | UART Clear to Send connected.
|-
| style="width: 41px;" | 35
| style="width: 182px;" | PCIE20_A_TX+
| style="width: 60px;" | I
| style="width: 474px;" | PCIe TX Differential signals.
|-
| style="width: 41px;" | 36
| style="width: 182px;" | SER1_RTS#_M2
| style="width: 60px;" | I
| style="width: 474px;" | UART Ready to Send connected.
|-
| style="width: 41px;" | 37
| style="width: 182px;" | PCIE20_A_TX-
| style="width: 60px;" | I
| style="width: 474px;" | PCIe TX Differential signals
|-
| style="width: 41px;" | 38
| style="width: 182px;" | N/A
| style="width: 60px;" | &nbsp;
| style="width: 474px;" | Not Applicable
|-
| style="width: 41px;" | 39
| style="width: 182px;" | GND
| style="width: 60px;" | &nbsp;
| style="width: 474px;" | Ground
|-
| style="width: 41px;" | 40
| style="width: 182px;" | N/A
| style="width: 60px;" | &nbsp;
| style="width: 474px;" | Not Applicable
|-
| style="width: 41px;" | 41
| style="width: 182px;" | PCIE20_A_RX+
| style="width: 60px;" | O
| style="width: 474px;" | PCIe RX Differential signals
|-
| style="width: 41px;" | 42
| style="width: 182px;" | N/A
| style="width: 60px;" | &nbsp;
| style="width: 474px;" | Not Applicable
|-
| style="width: 41px;" | 43
| style="width: 182px;" | PCIE20_A_RX-
| style="width: 60px;" | O
| style="width: 474px;" | PCIe RX Differential signals
|-
| style="width: 41px;" | 44
| style="width: 182px;" | N/A
| style="width: 60px;" | &nbsp;
| style="width: 474px;" | Not Applicable
|-
| style="width: 41px;" | 45
| style="width: 182px;" | GND
| style="width: 60px;" | &nbsp;
| style="width: 474px;" | Ground
|-
| style="width: 41px;" | 46
| style="width: 182px;" | N/A
| style="width: 60px;" | &nbsp;
| style="width: 474px;" | Not Applicable
|-
| style="width: 41px;" | 47
| style="width: 182px;" | PCIE20_A_CLK+
| style="width: 60px;" | I
| style="width: 474px;" | PCIe Reference Clock signals (100 MHz)
|-
| style="width: 41px;" | 48
| style="width: 182px;" | N/A
| style="width: 60px;" | &nbsp;
| style="width: 474px;" | Not Applicable
|-
| style="width: 41px;" | 49
| style="width: 182px;" | PCIE20_A_CLK-
| style="width: 60px;" | I
| style="width: 474px;" | PCIe Reference Clock signals (100 MHz)
|-
| style="width: 41px;" | 50
| style="width: 182px;" | CLKO_Z_WIFI
| style="width: 60px;" | I
| style="width: 474px;" | Suspend Clock is a 32.768 kHz clock
|-
| style="width: 41px;" | 51
| style="width: 182px;" | GND
| style="width: 60px;" | &nbsp;
| style="width: 474px;" | Ground
|-
| style="width: 41px;" | 52
| style="width: 182px;" | PERST#
| style="width: 60px;" | I
| style="width: 474px;" | PCIe Reset is a functional reset to the Adapter
|-
| style="width: 41px;" | 53
| style="width: 182px;" | PCIE_Z_REQ#
| style="width: 60px;" | I/O
| style="width: 474px;" | PCIe Clock Request is a reference clock request signal.
|-
| style="width: 41px;" | 54
| style="width: 182px;" | NGFF_BT_DISABLE#
| style="width: 60px;" | O
| style="width: 474px;" | Aactive Low,when applied by the system it will disable radio operation on the Adapter that implement radio frequency applications.
|-
| style="width: 41px;" | 55
| style="width: 182px;" | PE_WAKE#
| style="width: 60px;" | I/O
| style="width: 474px;" | PCIe WAKE#. When the Adapter supports wakeup, this signal is used to request that the system return from asleep/suspend state to service a function wake initiated wake event.
|-
| style="width: 41px;" | 56
| style="width: 182px;" | NGFF_WIFI_DISABLE#
| style="width: 60px;" | O
| style="width: 474px;" | Aactive Low,when applied by the system it will disable radio operation on the Adapter that implement radio frequency applications.
|-
| style="width: 41px;" | 57
| style="width: 182px;" | GND
| style="width: 60px;" | &nbsp;
| style="width: 474px;" | Ground
|-
| style="width: 41px;" | 58
| style="width: 182px;" | EKEY_SDA
| style="width: 60px;" | I/O
| style="width: 474px;" | I2C data.
|-
| style="width: 41px;" | 59
| style="width: 182px;" | N/A
| style="width: 60px;" | &nbsp;
| style="width: 474px;" | Not Applicable
|-
| style="width: 41px;" | 60
| style="width: 182px;" | EKEY_SCL
| style="width: 60px;" | I
| style="width: 474px;" | I2C clock input from host.
|-
| style="width: 41px;" | 61
| style="width: 182px;" | N/A
| style="width: 60px;" | &nbsp;
| style="width: 474px;" | Not Applicable
|-
| style="width: 41px;" | 62
| style="width: 182px;" | EKEY1_ALERT#
| style="width: 60px;" | O
| style="width: 474px;" | Active Low.IRQ line to host processor.
|-
| style="width: 41px;" | 63
| style="width: 182px;" | GND
| style="width: 60px;" | &nbsp;
| style="width: 474px;" | Ground
|-
| style="width: 41px;" | 64
| style="width: 182px;" | N/A
| style="width: 60px;" | &nbsp;
| style="width: 474px;" | Not Applicable
|-
| style="width: 41px;" | 65
| style="width: 182px;" | N/A
| style="width: 60px;" | &nbsp;
| style="width: 474px;" | Not Applicable
|-
| style="width: 41px;" | 66
| style="width: 182px;" | N/A
| style="width: 60px;" | &nbsp;
| style="width: 474px;" | Not Applicable
|-
| style="width: 41px;" | 67
| style="width: 182px;" | N/A
| style="width: 60px;" | &nbsp;
| style="width: 474px;" | Not Applicable
|-
| style="width: 41px;" | 68
| style="width: 182px;" | N/A
| style="width: 60px;" | &nbsp;
| style="width: 474px;" | Not Applicable
|-
| style="width: 41px;" | 69
| style="width: 182px;" | GND
| style="width: 60px;" | &nbsp;
| style="width: 474px;" | Ground
|-
| style="width: 41px;" | 70
| style="width: 182px;" | N/A
| style="width: 60px;" | &nbsp;
| style="width: 474px;" | Not Applicable
|-
| style="width: 41px;" | 71
| style="width: 182px;" | N/A
| style="width: 60px;" | &nbsp;
| style="width: 474px;" | Not Applicable
|-
| style="width: 41px;" | 72
| style="width: 182px;" | +V3.3E_M.2
| style="width: 60px;" | &nbsp;
| style="width: 474px;" | 3.3 V source
|-
| style="width: 41px;" | 73
| style="width: 182px;" | N/A
| style="width: 60px;" | &nbsp;
| style="width: 474px;" | Not Applicable
|-
| style="width: 41px;" | 74
| style="width: 182px;" | +V3.3E_M.2
| style="width: 60px;" | &nbsp;
| style="width: 474px;" | 3.3 V source
|-
| style="width: 41px;" | 75
| style="width: 182px;" | EKEY_CARD_PRSNT#
| style="width: 60px;" | I
| style="width: 474px;" | The Signal is to control TS3A44159PWR and TS3A27518ERTWR output.
|}

[[File:AOM-DB3500 M2 E1.png|RTENOTITLE]][[File:AOM-DB3500 M2 E1 Pin.png|RTENOTITLE]]

=== '''J8 M2_E1 Power Setting''' ===

{| border="1" cellpadding="1" cellspacing="1" style="width: 500px;"
|-
| '''Pin'''
| '''Function'''
|-
| J8（1-2）
| M2_E1 power 3.3V (Default)
|-
| J8（2-3）
| M2_E1 power 3.8V
|}

=== '''J9 M.2_B Power Setting''' ===

{| border="1" cellpadding="1" cellspacing="1" style="width: 500px;"
|-
| style="width: 131px;" | '''Pin'''
| style="width: 355px;" | '''Function'''
|-
| style="width: 131px;" | J9（1-2）
| style="width: 355px;" | (B2B pin B76-B79) to M2_E1 (Default)
|-
| style="width: 131px;" | J9（2-3）
| style="width: 355px;" | UART1 (B2B pin B76-B79) to M2_E2
|}

=== '''WIFI/BT&nbsp;Support Modle：''' ===

'''EWM-W179M201E RTL8852BE,Wifi6: PCIe + BT5.2: USB'''

'''AIW-162BS-GI1 Broadcom AP6275P, - 40°C~85°C PCIE+UART'''

[[File:EWM-W179M201E.png|RTENOTITLE]][[File:AIW-162BS-GI1.png|290x320px|AIW-162BS-GI1.png]]

1、Click the network icon in the top right corner of the screen and click the line of&nbsp;“Available networks” to select a Wi-Fi connection (for example: Advantech for&nbsp;guest)

[[File:ASR-A501 WIFI 1.png|RTENOTITLE]]

2、Enter the Wi-Fi password to connect to the device.

[[File:ASR-A501 WIFI 2.png|RTENOTITLE]]

3、If the password is correct, the device will connect quickly.

[[File:ASR-A501 WIFI 3.png|RTENOTITLE]]

After connection, Wi-Fi will create a net point “wlan0”.
<pre># ping -I wlan0 www.advantech.com
</pre>

=== '''BT（For example：“Mate 50 Pro”）''' ===

<span lang="EN-US" style="font-size:11.0pt">Step1</span><span style="font-size:11.0pt">：Click “Applications” -> “Settings”-> “Bluetooth manager”.&nbsp;</span><span lang="EN-US" style="font-size:11.0pt">Click the “Search” button to search for Bluetooth devices.</span>

[[File:ROM-6881 BT1.png|500x300px|ROM-6881 BT1.png]]

<span lang="EN-US" style="font-size:11.0pt">Step2</span><span style="font-size:11.0pt">：Right-click to select a device, such as “Mate 50 Pro”, and Connect Bluetooth.</span>

[[File:ROM-6881 BT2.png|500x300px|ROM-6881 BT2.png]]

<span lang="EN-US" style="font-size:11.0pt">Step3</span><span style="font-size:11.0pt">：AOM-3821 will start sending files when the receiver device, such as “Mate 50&nbsp;</span><span lang="EN-US" style="font-size:11.0pt">Pro</span><span style="font-size:11.0pt">”, confirms bluetooth reception.</span>

[[File:ROM-6881 BT3.png|500x300px|ROM-6881 BT3.png]]&nbsp;[[File:ROM-6881 BT3 1.png|500x300px|ROM-6881 BT3 1.png]]

Step4：View the location and information of the sent file.

[[File:AFE-E630 BT 162BS.png|RTENOTITLE]]

=== '''SATA（model:IM2S3334-512GCTB4）''' ===

&nbsp;