View source for AOM-DB3500 SPI CN1&SPI SN2&CN2 I2C——I2C/SPI


== '''I2C Pin Header''' ==

AOM-3821 has two I2C-PIN-Header channels.&nbsp;Using EG70 Test Board to read I2C flash. Using I2C0 as an example:

{| border="1" cellpadding="1" cellspacing="1" style="width: 500px;"
|-
| colspan="4" | '''I2C-PIN-Header'''
|-
| '''I2C Number'''
| '''Bus Number'''
| '''I2C Address'''
| '''AOM-DB3500 Number'''
|-
| I2C0
| 5
| 0x51
| CN2
|-
| I2C1
| 3
| 0x51
| CN4
|}

=== '''CN2_I2C''' ===

{| border="1" cellpadding="1" cellspacing="1" style="width: 495px;"
|-
| colspan="4" style="width: 485px;" | '''CN2 CN2 Connector Pin Definition'''
|-
| '''Pin'''
| '''Signal'''
| '''I/O'''
| style="width: 278px;" | '''Description'''
|-
| 1
| GND
| &nbsp;
| style="width: 278px;" | Ground
|-
| 2
| I2C0_DATA
| I/O
| style="width: 278px;" | I2C0 Data
|-
| 3
| I2C0_CLK
| I
| style="width: 278px;" | I2C0 clock input from host.
|-
| 4
| +V1.8
| &nbsp;
| style="width: 278px;" | 1.8V Source
|}
<pre># i2cdetect -y 5
# i2ctransfer -y 5 w4@0x51 0x1f 0xf0 0x22 0x33
# i2ctransfer -y 5 w2@0x51 0x1f 0xf0 r2
0x22 0x33&nbsp;
</pre>

[[File:AOM-DB3500 CN2 I2C.png|300x320px]]&nbsp;[[File:AOM-DB3500 CN2.png]]

=== '''CN4_I2C''' ===

{| border="1" cellpadding="1" cellspacing="1" style="width: 495px;"
|-
| colspan="4" style="width: 485px;" | '''CN4 CN4 Connector Pin Definition'''
|-
| '''Pin'''
| '''Signal'''
| '''I/O'''
| style="width: 278px;" | '''Description'''
|-
| 1
| GND
| &nbsp;
| style="width: 278px;" | Ground
|-
| 2
| I2C1_DATA
| I/O
| style="width: 278px;" | I2C1 Data
|-
| 3
| I2C1_CLK
| I
| style="width: 278px;" | I2C0 clock input from host.
|-
| 4
| +V1.8
| &nbsp;
| style="width: 278px;" | 1.8V Source
|}
<pre># i2cdetect -y 3
# i2ctransfer -y 3 w4@0x51 0x1f 0xf0 0x22 0x33
# i2ctransfer -y 3 w2@0x51 0x1f 0xf0 r2
0x22 0x33
</pre>

[[File:AOM-DB3500 CN4 I2C.png|300x320px]][[File:AOM-DB3500 CN4.png]]


== '''SPI PIN Header''' ==

AOM-3821 has two SPI-PIN-Header channels. SPIs on AOM-DB3500 have multi-functions, change to SPI PIN Header.

=== '''SPI_CN1''' ===

{| border="1" cellpadding="1" cellspacing="1" style="width: 500px;"
|-
| colspan="4" | '''SPI_CN1 Connector Pin Definition'''
|-
| '''Pin'''
| '''Signal'''
| style="width: 63px;" | '''I/O'''
| style="width: 242px;" | '''Description'''
|-
| 1
| +V1.8
| style="width: 63px;" | &nbsp;
| style="width: 242px;" | Power Supply
|-
| 2
| GND
| style="width: 63px;" | &nbsp;
| style="width: 242px;" | Ground
|-
| 3
| SPI1_CS0#
| style="width: 63px;" | I
| style="width: 242px;" | SPI1Chip Select Inpu
|-
| 4
| SPI1_CLK
| style="width: 63px;" | I
| style="width: 242px;" | SPI1 Serial Clock Input
|-
| 5
| SPI1_MISO
| style="width: 63px;" | I
| style="width: 242px;" | SPI1 Master Out Slave in
|-
| 6
| SPI1_MOSI
| style="width: 63px;" | O
| style="width: 242px;" | SPI1 Master In Slave Out
|-
| 7
| NA
| style="width: 63px;" | &nbsp;
| style="width: 242px;" | Not Applicable
|-
| 8
| SPI1_CS1#
| style="width: 63px;" | I
| style="width: 242px;" | SPI Chip Select Input
|}

=== '''J5''' ===

{| border="1" cellpadding="1" cellspacing="1" style="width: 500px;"
|-
| colspan="2" | '''J5 SPI1_CS0# or SPI1_CS1# Select'''
|-
| '''Pin'''
| '''Function'''
|-
| 1-2
| SPI1_CS0# [Default]
|-
| 2-3
| SPI1_CS1#
|}

=== '''SPI_CN2''' ===

{| border="1" cellpadding="1" cellspacing="1" style="width: 500px;"
|-
| colspan="4" | '''SPI_CN2 Connector Pin Definition'''
|-
| '''Pin'''
| '''Signal'''
| style="width: 63px;" | '''I/O'''
| style="width: 242px;" | '''Description'''
|-
| 1
| +V1.8
| style="width: 63px;" | &nbsp;
| style="width: 242px;" | Power Supply
|-
| 2
| GND
| style="width: 63px;" | &nbsp;
| style="width: 242px;" | Ground
|-
| 3
| SPI0_CS0#
| style="width: 63px;" | I
| style="width: 242px;" | SPI0Chip Select Inpu
|-
| 4
| SPI0_CLK
| style="width: 63px;" | I
| style="width: 242px;" | SPI0 Serial Clock Input
|-
| 5
| SPI0_MISO
| style="width: 63px;" | I
| style="width: 242px;" | SPI0 Master Out Slave in
|-
| 6
| SPI0_MOSI
| style="width: 63px;" | O
| style="width: 242px;" | SPI0 Master In Slave Out
|-
| 7
| NA
| style="width: 63px;" | &nbsp;
| style="width: 242px;" | Not Applicable
|-
| 8
| SPI0_CS1#
| style="width: 63px;" | I
| style="width: 242px;" | SPI Chip Select Input
|}

=== '''J6''' ===

{| border="1" cellpadding="1" cellspacing="1" style="width: 500px;"
|-
| colspan="2" | '''J6 SPI0_CS0# or SPI0_CS1# Select'''
|-
| '''Pin'''
| '''Function'''
|-
| 1-2
| SPI0_CS0#[Default]
|-
| 2-3
| SPI0_CS1#
|}

Using EG70 Test Board to read SPI flash.<br/> Test one SPI port alternatively:
<pre># cat /proc/mtd | grep –c mtd01</pre>

Test two SPI ports at the same time:
<pre># cat /proc/mtd | grep -c mtd11</pre>

RK Tool&nbsp; Test：
<pre># /tools/test/adv/spi/spi_test.sh 0
# /tools/test/adv/spi/spi_test.sh 1</pre>

[[File:AOM-DB3500 SPI.png|RTENOTITLE]]