Difference between revisions of "X86/TSN"
From ESS-WIKI
(Undo revision 24459 by Winston.huang (talk)) |
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| − | + | {{DISPLAYTITLE:Intel Linux for TSN validation}} | |
| − | {{DISPLAYTITLE: | ||
<div style="float:right; position:fixed; margin:0 1em 0 0; top:200px; right:10px; max-height: 350px; overflow: auto">__TOC__</div> | <div style="float:right; position:fixed; margin:0 1em 0 0; top:200px; right:10px; max-height: 350px; overflow: auto">__TOC__</div> | ||
| − | == | + | == Elkhark Lake == |
| − | + | all EHL images are stored on [https://www.dropbox.com/sh/hjdm01i77di6dij/AABsYU7Rd1q4KiHSe1zPymOga/EHL this]. | |
| − | {| class="wikitable | + | {| class="wikitable" style="text-align: center" border="2" |
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! '''version''' | ! '''version''' | ||
| − | ! '''image''' | + | ! '''base image''' |
| + | ! '''image including TSN scripts''' | ||
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| − | + | | valign="center" align="center" | | |
| − | | valign="center" align="center" | | + | {| |
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| − | + | | MR1 | |
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| − | | | + | | MR3 |
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| valign="top" align="left" | | | valign="top" align="left" | | ||
{| | {| | ||
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| − | | | + | | core-image-sato-sdk-intel-corei7-64.wic.md5 |
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| − | | | + | | core-image-sato-sdk-intel-corei7-64.wic.bmap |
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| − | | | + | | core-image-sato-sdk-intel-corei7-64.wic.bz2 |
|} | |} | ||
| − | | valign=" | + | | valign="center" align="center" | |
| − | + | [[X86/TSN/EHL|click here]] | |
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|} | |} | ||
| − | + | <span id="EHL_Notice_for_MR3">Notice for MR3:</span> | |
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| − | + | : BIOS setting : Chipset -> PCH-IO Configuration -> PinCntrl Driver GPIO Scheme [<span style="color:#FF0000">Enabled</span>] | |
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| − | + | == Tiger Lake == | |
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| − | + | all TGL images are stored on [https://www.dropbox.com/sh/hjdm01i77di6dij/AAAKWHFiUEemlKIiQJieU1lHa/TGL this]. | |
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| − | | | + | {| class="wikitable" style="text-align: center" border="2" |
|- | |- | ||
| − | + | ! '''version''' | |
| − | + | ! '''base image''' | |
| + | ! '''image including TSN scripts''' | ||
|- | |- | ||
| − | + | | valign="center" align="center" | | |
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| − | | valign=" | ||
{| | {| | ||
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| − | | | + | | MR4 |
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|} | |} | ||
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| valign="top" align="left" | | | valign="top" align="left" | | ||
{| | {| | ||
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| − | | | + | | core-image-sato-sdk-intel-corei7-64.wic.md5 |
|- | |- | ||
| − | | | + | | core-image-sato-sdk-intel-corei7-64.wic.bmap |
|- | |- | ||
| − | | | + | | core-image-sato-sdk-intel-corei7-64.wic.bz2 |
|} | |} | ||
| − | | valign=" | + | | valign="center" align="center" | |
| − | + | [[X86/TSN/TGL|click here]] | |
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|} | |} | ||
| + | == Alder Lake == | ||
| − | + | all ADL images are stored on [https://www.dropbox.com/sh/hjdm01i77di6dij/AACRgJ8ZZX1TQr-ZTYgcvOaIa/ADL this]. | |
| − | |||
| − | {| class="wikitable | + | {| class="wikitable" style="text-align: center" border="2" |
|- | |- | ||
| − | ! ''' | + | ! '''version''' |
| − | ! ''' | + | ! '''base image''' |
| − | ! ''' | + | ! '''image including TSN scripts''' |
|- | |- | ||
| − | | valign=" | + | | valign="center" align="center" | |
{| | {| | ||
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| − | | | + | | PV |
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{| | {| | ||
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| − | | | + | | core-image-sato-sdk-intel-corei7-64.wic.md5 |
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| − | | | + | | core-image-sato-sdk-intel-corei7-64.wic.bmap |
|- | |- | ||
| − | | | + | | core-image-sato-sdk-intel-corei7-64.wic.bz2 |
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|} | |} | ||
| − | | valign=" | + | | valign="center" align="center" | |
| + | [[X86/TSN/ADL|click here]] | ||
| + | |||
|} | |} | ||
Revision as of 04:23, 20 June 2022
Contents
Elkhark Lake
all EHL images are stored on this.
| version | base image | image including TSN scripts | ||||||
|---|---|---|---|---|---|---|---|---|
|
|
Notice for MR3:
- BIOS setting : Chipset -> PCH-IO Configuration -> PinCntrl Driver GPIO Scheme [Enabled]
Tiger Lake
all TGL images are stored on this.
| version | base image | image including TSN scripts | ||||
|---|---|---|---|---|---|---|
|
|
Alder Lake
all ADL images are stored on this.
| version | base image | image including TSN scripts | ||||
|---|---|---|---|---|---|---|
|
|