Difference between revisions of "X86/TSN"

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(Elkhark Lake)
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| valign="center" align="center" |  
 
| valign="center" align="center" |  
 
[[X86/TSN/ADL|click here]]
 
[[X86/TSN/ADL|click here]]
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|}
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== Alder Lake-N==
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{| class="wikitable" style="text-align: center" border="2"
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|-
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! '''version'''
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! '''base image'''
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! '''add-ons'''
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! '''base image'''
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|-
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| valign="center" align="center" |
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{|
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|-
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| PV
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|}
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| valign="top" align="left" |
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{|
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|-
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| core-image-sato-sdk-intel-corei7-64.wic.md5
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|-
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| core-image-sato-sdk-intel-corei7-64.wic.bmap
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|-
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| core-image-sato-sdk-intel-corei7-64.wic.bz2
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|}
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| valign="center" align="center" |
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[[X86/TSN/ADD-ONs|click here]]
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| valign="center" align="center" |
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[https://www.dropbox.com/scl/fo/cme10rwe6l1nitwdf71ay/h?dl=0&rlkey=hcgv2k50z7wu0kykb3aln5y3g click here]
  
 
|}
 
|}

Revision as of 07:14, 28 April 2023

Elkhark Lake

version base image add-ons base image full image
MR1 ~ MR6
core-image-sato-sdk-intel-corei7-64.wic.md5
core-image-sato-sdk-intel-corei7-64.wic.bmap
core-image-sato-sdk-intel-corei7-64.wic.bz2

click here

click here

click here

Notice for MR3 or later:

BIOS setting : Chipset -> PCH-IO Configuration -> PinCntrl Driver GPIO Scheme [Enabled]

Tiger Lake

version base image add-ons base image full image
MR4
MR6
core-image-sato-sdk-intel-corei7-64.wic.md5
core-image-sato-sdk-intel-corei7-64.wic.bmap
core-image-sato-sdk-intel-corei7-64.wic.bz2

click here

click here

click here

Alder Lake

version base image add-ons base image full image
PV
core-image-sato-sdk-intel-corei7-64.wic.md5
core-image-sato-sdk-intel-corei7-64.wic.bmap
core-image-sato-sdk-intel-corei7-64.wic.bz2

click here

click here

click here

Alder Lake-N

version base image add-ons base image
PV
core-image-sato-sdk-intel-corei7-64.wic.md5
core-image-sato-sdk-intel-corei7-64.wic.bmap
core-image-sato-sdk-intel-corei7-64.wic.bz2

click here

click here