Difference between revisions of "X86/TSN"

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(Created page with "{{DISPLAYTITLE:Intel Linux for TSN validation}} <div style="float:right; position:fixed; margin:0 1em 0 0; top:200px; right:10px; max-height: 350px; overflow: auto">__TO...")
 
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Notice for MR3:
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: BIOS setting : Chipset -> PCH-IO Configuration -> PinCntrl Driver GPIO Scheme [<span style="color:#FF0000">Enabled</span>]
  
 
== Tiger Lake ==
 
== Tiger Lake ==

Revision as of 07:13, 8 June 2022

Elkhark Lake

all EHL images are stored on this.

version base image image including TSN scripts
MR1
MR2
MR3
core-image-sato-sdk-intel-corei7-64.wic.md5
core-image-sato-sdk-intel-corei7-64.wic.bmap
core-image-sato-sdk-intel-corei7-64.wic.bz2

click here

Notice for MR3:

BIOS setting : Chipset -> PCH-IO Configuration -> PinCntrl Driver GPIO Scheme [Enabled]

Tiger Lake

all TGL images are stored on this.

version base image image including TSN scripts
MR4
core-image-sato-sdk-intel-corei7-64.wic.md5
core-image-sato-sdk-intel-corei7-64.wic.bmap
core-image-sato-sdk-intel-corei7-64.wic.bz2

click here

Alder Lake

all ADL images are stored on this.

version base image image including TSN scripts
PV
core-image-sato-sdk-intel-corei7-64.wic.md5
core-image-sato-sdk-intel-corei7-64.wic.bmap
core-image-sato-sdk-intel-corei7-64.wic.bz2

click here