Difference between revisions of "X86/TSN"

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(Alder Lake)
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== Alder Lake ==
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== Alder Lake-S ==
  
 
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{| class="wikitable" style="text-align: center" border="2"
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[[X86/TSN/EHL|click here]]
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[[X86/TSN/ADL|click here]]
  
 
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Revision as of 07:07, 2 May 2023

Elkhark Lake

version base image add-ons base image full image
MR1 ~ MR6
core-image-sato-sdk-intel-corei7-64.wic.md5
core-image-sato-sdk-intel-corei7-64.wic.bmap
core-image-sato-sdk-intel-corei7-64.wic.bz2

click here

click here

MR1/MR3 only

Notice for MR3 or later:

BIOS setting : Chipset -> PCH-IO Configuration -> PinCntrl Driver GPIO Scheme [Enabled]

Tiger Lake

version base image add-ons base image full image
MR4
MR6
core-image-sato-sdk-intel-corei7-64.wic.md5
core-image-sato-sdk-intel-corei7-64.wic.bmap
core-image-sato-sdk-intel-corei7-64.wic.bz2

click here

click here

MR4 only

Alder Lake-S

version base image add-ons base image full image
PV
core-image-sato-sdk-intel-corei7-64.wic.md5
core-image-sato-sdk-intel-corei7-64.wic.bmap
core-image-sato-sdk-intel-corei7-64.wic.bz2

click here

click here

click here

Alder Lake-N

version base image add-ons base image
PV
core-image-sato-sdk-intel-corei7-64.wic.md5
core-image-sato-sdk-intel-corei7-64.wic.bmap
core-image-sato-sdk-intel-corei7-64.wic.bz2

click here

click here